<TABLE BORDER="1" cellspacing="1" cellpadding="2">
<TR valign="middle" bgcolor="#C0C0C0">
<TH>Hierarchy</TH>
<TH>Input</TH>
<TH>Constant Input</TH>
<TH>Unused Input</TH>
<TH>Floating Input</TH>
<TH>Output</TH>
<TH>Constant Output</TH>
<TH>Unused Output</TH>
<TH>Floating Output</TH>
<TH>Bidir</TH>
<TH>Constant Bidir</TH>
<TH>Unused Bidir</TH>
<TH>Input only Bidir</TH>
<TH>Output only Bidir</TH>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">CPU0|nios_system_reset_clk_0_domain_synch</TD>
<TD ALIGN="LEFT">3</TD>
<TD ALIGN="LEFT">1</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">1</TD>
<TD ALIGN="LEFT">1</TD>
<TD ALIGN="LEFT">1</TD>
<TD ALIGN="LEFT">1</TD>
<TD ALIGN="LEFT">1</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">CPU0|the_onchip_memory2_0|the_altsyncram|auto_generated|mux2</TD>
<TD ALIGN="LEFT">65</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">32</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">CPU0|the_onchip_memory2_0|the_altsyncram|auto_generated|deep_decode</TD>
<TD ALIGN="LEFT">2</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">2</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">CPU0|the_onchip_memory2_0|the_altsyncram|auto_generated|decode3</TD>
<TD ALIGN="LEFT">2</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">2</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">CPU0|the_onchip_memory2_0|the_altsyncram|auto_generated</TD>
<TD ALIGN="LEFT">52</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">32</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">CPU0|the_onchip_memory2_0</TD>
<TD ALIGN="LEFT">53</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">32</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">CPU0|the_onchip_memory2_0_s1</TD>
<TD ALIGN="LEFT">108</TD>
<TD ALIGN="LEFT">1</TD>
<TD ALIGN="LEFT">4</TD>
<TD ALIGN="LEFT">1</TD>
<TD ALIGN="LEFT">94</TD>
<TD ALIGN="LEFT">1</TD>
<TD ALIGN="LEFT">1</TD>
<TD ALIGN="LEFT">1</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">CPU0|the_cpu_0|the_cpu_0_nios2_oci|the_cpu_0_jtag_debug_module_wrapper|the_cpu_0_jtag_debug_module_sysclk</TD>
<TD ALIGN="LEFT">43</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">51</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">CPU0|the_cpu_0|the_cpu_0_nios2_oci|the_cpu_0_jtag_debug_module_wrapper|the_cpu_0_jtag_debug_module_tck</TD>
<TD ALIGN="LEFT">130</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">1</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">43</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">CPU0|the_cpu_0|the_cpu_0_nios2_oci|the_cpu_0_jtag_debug_module_wrapper</TD>
<TD ALIGN="LEFT">123</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">53</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">CPU0|the_cpu_0|the_cpu_0_nios2_oci|the_cpu_0_nios2_oci_im|cpu_0_traceram_lpm_dram_bdp_component|the_altsyncram|auto_generated</TD>
<TD ALIGN="LEFT">92</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">72</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">CPU0|the_cpu_0|the_cpu_0_nios2_oci|the_cpu_0_nios2_oci_im|cpu_0_traceram_lpm_dram_bdp_component</TD>
<TD ALIGN="LEFT">92</TD>
<TD ALIGN="LEFT">2</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">2</TD>
<TD ALIGN="LEFT">72</TD>
<TD ALIGN="LEFT">2</TD>
<TD ALIGN="LEFT">2</TD>
<TD ALIGN="LEFT">2</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">CPU0|the_cpu_0|the_cpu_0_nios2_oci|the_cpu_0_nios2_oci_im</TD>
<TD ALIGN="LEFT">97</TD>
<TD ALIGN="LEFT">36</TD>
<TD ALIGN="LEFT">17</TD>
<TD ALIGN="LEFT">36</TD>
<TD ALIGN="LEFT">48</TD>
<TD ALIGN="LEFT">36</TD>
<TD ALIGN="LEFT">36</TD>
<TD ALIGN="LEFT">36</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">CPU0|the_cpu_0|the_cpu_0_nios2_oci|the_cpu_0_nios2_oci_pib</TD>
<TD ALIGN="LEFT">39</TD>
<TD ALIGN="LEFT">20</TD>
<TD ALIGN="LEFT">38</TD>
<TD ALIGN="LEFT">20</TD>
<TD ALIGN="LEFT">19</TD>
<TD ALIGN="LEFT">20</TD>
<TD ALIGN="LEFT">20</TD>
<TD ALIGN="LEFT">20</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">CPU0|the_cpu_0|the_cpu_0_nios2_oci|the_cpu_0_nios2_oci_fifo|the_cpu_0_oci_test_bench</TD>
<TD ALIGN="LEFT">36</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">36</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">CPU0|the_cpu_0|the_cpu_0_nios2_oci|the_cpu_0_nios2_oci_fifo|cpu_0_nios2_oci_fifocount_inc_fifocount</TD>
<TD ALIGN="LEFT">5</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">5</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">CPU0|the_cpu_0|the_cpu_0_nios2_oci|the_cpu_0_nios2_oci_fifo|cpu_0_nios2_oci_fifowp_inc_fifowp</TD>
<TD ALIGN="LEFT">4</TD>
<TD ALIGN="LEFT">2</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">2</TD>
<TD ALIGN="LEFT">4</TD>
<TD ALIGN="LEFT">2</TD>
<TD ALIGN="LEFT">2</TD>
<TD ALIGN="LEFT">2</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">CPU0|the_cpu_0|the_cpu_0_nios2_oci|the_cpu_0_nios2_oci_fifo|cpu_0_nios2_oci_compute_tm_count_tm_count</TD>
<TD ALIGN="LEFT">3</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">2</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">CPU0|the_cpu_0|the_cpu_0_nios2_oci|the_cpu_0_nios2_oci_fifo</TD>
<TD ALIGN="LEFT">151</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">65</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">36</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">CPU0|the_cpu_0|the_cpu_0_nios2_oci|the_cpu_0_nios2_oci_dtrace|cpu_0_nios2_oci_trc_ctrl_td_mode</TD>
<TD ALIGN="LEFT">9</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">6</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">4</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">CPU0|the_cpu_0|the_cpu_0_nios2_oci|the_cpu_0_nios2_oci_dtrace</TD>
<TD ALIGN="LEFT">102</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">91</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">72</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">CPU0|the_cpu_0|the_cpu_0_nios2_oci|the_cpu_0_nios2_oci_itrace</TD>
<TD ALIGN="LEFT">25</TD>
<TD ALIGN="LEFT">17</TD>
<TD ALIGN="LEFT">23</TD>
<TD ALIGN="LEFT">17</TD>
<TD ALIGN="LEFT">87</TD>
<TD ALIGN="LEFT">17</TD>
<TD ALIGN="LEFT">17</TD>
<TD ALIGN="LEFT">17</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">CPU0|the_cpu_0|the_cpu_0_nios2_oci|the_cpu_0_nios2_oci_dbrk</TD>
<TD ALIGN="LEFT">87</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">91</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">CPU0|the_cpu_0|the_cpu_0_nios2_oci|the_cpu_0_nios2_oci_xbrk</TD>
<TD ALIGN="LEFT">53</TD>
<TD ALIGN="LEFT">5</TD>
<TD ALIGN="LEFT">50</TD>
<TD ALIGN="LEFT">5</TD>
<TD ALIGN="LEFT">6</TD>
<TD ALIGN="LEFT">5</TD>
<TD ALIGN="LEFT">5</TD>
<TD ALIGN="LEFT">5</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">CPU0|the_cpu_0|the_cpu_0_nios2_oci|the_cpu_0_nios2_oci_break</TD>
<TD ALIGN="LEFT">52</TD>
<TD ALIGN="LEFT">36</TD>
<TD ALIGN="LEFT">6</TD>
<TD ALIGN="LEFT">36</TD>
<TD ALIGN="LEFT">71</TD>
<TD ALIGN="LEFT">36</TD>
<TD ALIGN="LEFT">36</TD>
<TD ALIGN="LEFT">36</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">CPU0|the_cpu_0|the_cpu_0_nios2_oci|the_cpu_0_nios2_avalon_reg</TD>
<TD ALIGN="LEFT">49</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">29</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">68</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">CPU0|the_cpu_0|the_cpu_0_nios2_oci|the_cpu_0_nios2_ocimem|cpu_0_ociram_lpm_dram_bdp_component|the_altsyncram|auto_generated</TD>
<TD ALIGN="LEFT">90</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">64</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">CPU0|the_cpu_0|the_cpu_0_nios2_oci|the_cpu_0_nios2_ocimem|cpu_0_ociram_lpm_dram_bdp_component</TD>
<TD ALIGN="LEFT">90</TD>
<TD ALIGN="LEFT">2</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">2</TD>
<TD ALIGN="LEFT">64</TD>
<TD ALIGN="LEFT">2</TD>
<TD ALIGN="LEFT">2</TD>
<TD ALIGN="LEFT">2</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">CPU0|the_cpu_0|the_cpu_0_nios2_oci|the_cpu_0_nios2_ocimem</TD>
<TD ALIGN="LEFT">93</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">6</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">64</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">CPU0|the_cpu_0|the_cpu_0_nios2_oci|the_cpu_0_nios2_oci_debug</TD>
<TD ALIGN="LEFT">50</TD>
<TD ALIGN="LEFT">1</TD>
<TD ALIGN="LEFT">30</TD>
<TD ALIGN="LEFT">1</TD>
<TD ALIGN="LEFT">7</TD>
<TD ALIGN="LEFT">1</TD>
<TD ALIGN="LEFT">1</TD>
<TD ALIGN="LEFT">1</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">CPU0|the_cpu_0|the_cpu_0_nios2_oci</TD>
<TD ALIGN="LEFT">156</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">68</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">CPU0|the_cpu_0|cpu_0_rf|the_altsyncram|auto_generated</TD>
<TD ALIGN="LEFT">80</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">64</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">CPU0|the_cpu_0|cpu_0_rf</TD>
<TD ALIGN="LEFT">80</TD>
<TD ALIGN="LEFT">2</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">2</TD>
<TD ALIGN="LEFT">64</TD>
<TD ALIGN="LEFT">2</TD>
<TD ALIGN="LEFT">2</TD>
<TD ALIGN="LEFT">2</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">CPU0|the_cpu_0|the_cpu_0_test_bench</TD>
<TD ALIGN="LEFT">423</TD>
<TD ALIGN="LEFT">3</TD>
<TD ALIGN="LEFT">386</TD>
<TD ALIGN="LEFT">3</TD>
<TD ALIGN="LEFT">34</TD>
<TD ALIGN="LEFT">3</TD>
<TD ALIGN="LEFT">3</TD>
<TD ALIGN="LEFT">3</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">CPU0|the_cpu_0</TD>
<TD ALIGN="LEFT">149</TD>
<TD ALIGN="LEFT">32</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">32</TD>
<TD ALIGN="LEFT">107</TD>
<TD ALIGN="LEFT">32</TD>
<TD ALIGN="LEFT">32</TD>
<TD ALIGN="LEFT">32</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">CPU0|the_cpu_0_instruction_master</TD>
<TD ALIGN="LEFT">94</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">4</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">50</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">CPU0|the_cpu_0_data_master</TD>
<TD ALIGN="LEFT">96</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">4</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">50</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">CPU0|the_cpu_0_jtag_debug_module</TD>
<TD ALIGN="LEFT">110</TD>
<TD ALIGN="LEFT">2</TD>
<TD ALIGN="LEFT">4</TD>
<TD ALIGN="LEFT">2</TD>
<TD ALIGN="LEFT">92</TD>
<TD ALIGN="LEFT">2</TD>
<TD ALIGN="LEFT">2</TD>
<TD ALIGN="LEFT">2</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">CPU0</TD>
<TD ALIGN="LEFT">2</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
<TD ALIGN="LEFT">0</TD>
</TR>
</TABLE>
